As circuit dimensions shrink the need for fine-line lithography becomes more critical and the requirements for planarizing topography becomes very severe. Major U.S. semiconductor companies are actively pursuing Chemical-Mechanical Polishing (CMP) as the planarization technique used in the sub-half micron generation of chips. CMP is used for planarizing bare silicon wafers, interlevel dielectrics, and other materials. CMP machines, such as the one shown in FIG. 1, use orbital, circular, lapping motions to planarize a film on wafer 16. The wafer 16 is held on a rotating carrier 18 while the face of the wafer 16 being polished is pressed against a resilient polishing pad 14 attached to a rotating platen disk 12. A slurry is used to chemically attack the wafer surface to make the surface more easily removed by mechanical abrasion of the pad 14.
In a standard CMP process, topographical steps on the surface of a wafer are polished fiat so that the surface of the wafer is very planar. This is illustrated in FIG. 2. Typically, a single layer of silicon dioxide 30 is deposited over the underlying topography 32 (usually metal lines). The polish rate is constant throughout the thickness of the film, however, the polish rate on top of the steps 28a-b are higher due to higher pressure on those areas. The mechanical component in CMP follows the law, P=F/A (pressure equals force divided by area). Since the force is constant in CMP, pressure varies with that area in which the polishing pad 14 contacts the surface of the wafer 16. Accordingly, more of layer 30 is removed over a narrow step 28a, than over a wide step 28b and more of layer 30 is removed over wide step 28b than over the field areas 34.
One of the major costs of running CMP is the low throughput of current CMP processes. In typical semiconductor fabrication equipment, a throughput of 20-30 wafers per hour is considered good. The higher the throughput, the lower the cost of running a process becomes if the other factors remain constant. Currently, in a standard oxide CMP planarization processes, the throughput is only 6-12 wafers per hour. This low throughput is considered one of the major drawbacks of CMP. Accordingly, there is a need for reducing the CMP polishing time.